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00AA30: 74 65 72 65 73 74 65 64 20 69 6E 2E A3 20 20 20 terested in.£
00AA40: 20 45 58 41 4D 50 4C 45 53 20 4F 46 20 2B 56 45 EXAMPLES OF +VE
00AA50: 20 41 4E 44 20 2D 56 45 20 4E 4F 54 41 54 49 4F AND -VE NOTATIO
00AA60: 4E A0 A0 20 41 6C 74 68 6F 75 67 68 20 20 74 68 N.. Although th
00AA70: 65 73 65 20 20 65 78 61 6D 70 6C 65 73 20 20 61 ese examples a
00AA80: 70 70 65 61 72 20 74 6F 20 62 65 61 6C 6C 20 70 ppear to beall p
00AA90: 6F 73 69 74 69 76 65 2C 20 74 68 65 79 20 63 61 ositive, they ca
00AAA0: 6E 20 62 65 20 76 69 65 77 65 64 20 65 71 75 61 n be viewed equa
00AAB0: 6C 6C 79 61 73 20 20 6E 65 65 25 67 61 74 69 76 llyas nee%gativ
00AAC0: 65 20 20 77 68 65 72 65 20 61 70 70 72 6F 70 72 e where appropr
00AAD0: 69 61 74 65 20 61 6E 64 20 20 74 68 65 53 69 67 iate and theSig
00AAE0: 6E 20 20 20 61 6E 64 20 20 20 6F 76 65 72 66 6C n and overfl
00AAF0: 6F 77 20 20 20 66 6C 61 67 73 20 20 20 6F 62 73 ow flags obs
00AB00: 65 72 76 65 64 6F 70 65 72 61 74 69 6E 67 2E A0 ervedoperating..
00AB10: A0 20 52 65 6D 65 6D 62 65 72 20 20 61 20 20 20 . Remember a
00AB20: 6E 75 6D 62 65 72 20 20 20 61 62 6F 76 65 20 20 number above
00AB30: 20 31 32 38 20 20 20 69 73 6E 65 67 61 74 69 76 128 isnegativ
00AB40: 65 2E 20 53 69 6E 63 65 20 61 6C 6C 20 74 68 65 e. Since all the
00AB50: 20 6E 65 67 61 74 69 76 65 20 6E 75 6D 62 65 72 negative number
00AB60: 73 69 6E 20 74 68 65 20 65 78 61 6D 70 6C 65 73 sin the examples
00AB70: 20 61 72 65 20 73 6D 61 6C 6C 2C 20 20 74 68 65 are small, the
00AB80: 79 20 20 63 61 6E 20 62 65 73 65 65 6E 20 71 75 y can beseen qu
00AB90: 69 63 6B 6C 79 20 61 6E 64 20 73 69 6D 70 6C 79 ickly and simply
00ABA0: 20 62 65 20 63 6F 6E 76 65 72 74 65 64 20 20 62 be converted b
00ABB0: 79 73 75 62 74 72 61 63 74 69 6E 7F 53 67 20 74 ysubtractin.Sg t
00ABC0: 68 65 20 6E 75 6D 62 65 72 20 66 72 6F 6D 20 32 he number from 2
00ABD0: 35 36 2E A0 A0 20 69 2E 65 2E 20 20 2D 32 20 20 56... i.e. -2
00ABE0: 69 73 20 65 71 75 69 76 61 6C 65 6E 74 20 74 6F is equivalent to
00ABF0: 20 32 35 34 20 65 74 63 2E A3 20 4C 44 20 41 2C 254 etc.£ LD A,
00AC00: 32 35 34 A0 20 20 4E 45 47 A0 20 20 4E 45 47 A0 254. NEG. NEG.
00AC10: 20 20 41 44 44 20 41 2C 32 A0 20 20 49 4E 43 20 ADD A,2. INC
00AC20: 41 A0 20 20 4C 44 20 48 4C 2C 32 A0 20 20 4C 44 A. LD HL,2. LD
00AC30: 20 44 45 2C 46 46 46 45 48 A0 20 20 41 44 44 20 DE,FFFEH. ADD
00AC40: 48 4C 2C 44 45 A0 20 20 43 50 4C A0 20 20 4C 44 HL,DE. CPL. LD
00AC50: 20 48 4C 2C 53 54 4F 52 45 A0 20 20 4C 44 20 28 HL,STORE. LD (
00AC60: 48 4C 29 2C 37 46 48 A0 20 20 49 4E 43 20 28 48 HL),7FH. INC (H
00AC70: 4C 29 A0 20 20 52 45 54 A0 20 20 A0 20 53 54 4F L). RET. . STO
00AC80: 52 45 20 42 49 4E 20 30 A0 20 20 A0 20 38 38 12 RE BIN 0. . 88.
00AC90: 7C 90 28 24 22 38 38 90 7C 12 28 48 88 00 3C 18 |.($"88.|.(H..<.
00ACA0: 3C 3C 3C 18 00 3C FF FF 18 0C 18 30 18 18 3C 7E <<<..<.....0..<~
00ACB0: 18 18 7E 3C 18 00 24 66 FF 66 24 00 00 2F 20 00 ..~<..$f.f$../ .
00ACC0: C9 C9 C9 C9 C9 C9 C9 C9 C9 C9 C9 C9 C9 C9 C9 C9 ................
00ACD0: C9 C9 C9 C9 C9 C9 C9 C9 C9 C9 C9 00 FF 00 00 FF ................
00ACE0: 00 00 00 84 FF FF 00 00 00 3F 88 80 03 00 00 FF .........?......
00ACF0: FF 00 00 00 00 00 00 FF FF 00 08 79 C8 FD 00 FF ...........y....
00AD00: FF 00 00 FF FF 00 08 79 C8 FD 00 FF FF 00 00 FF .......y........
00AD10: FF 00 08 79 C8 FD 00 FF FF 00 00 FF FF 00 00 FF ...y............
00AD20: FF 00 00 00 02 79 C8 FD FF 00 00 FF FF 00 00 FF .....y..........
00AD30: FF 00 00 FF FF 00 04 79 C8 FD 00 FF FF 00 00 FF .......y........
00AD40: FF 00 00 FF DF 00 00 00 08 79 C8 FD FF 00 00 FF .........y......
00AD50: FF 00 00 FF FF 00 00 FF FF 00 10 79 C8 FD 00 FF ...........y....
00AD60: FF 00 00 32 00 76 65 20 22 54 45 58 54 32 22 2C ...2.ve "TEXT2",
00AD70: 42 2C 26 35 38 30 30 2C 26 35 35 30 30 20 00 00 B,&5800,&5500 ..
00AD80: 54 45 52 22 00 61 00 64 00 30 30 31 00 00 37 39 TER".a.d.001..79
00AD90: 2C 26 65 64 2C 26 37 38 2C 26 63 62 2C 26 34 37 ,&ed,&78,&cb,&47
00ADA0: 00 26 31 62 2C 26 37 61 2C 26 42 33 20 00 66 2C .&1b,&7a,&B3 .f,
00ADB0: 26 30 00 FF FF 00 00 FF FF 00 00 FF FF 00 00 7B &0.............{
00ADC0: B8 FF FF FF FF .....
RESULT OF SEARCH :
PRO=48 CHEA=0 COD=6 MUSI=0 COP=1 GRA=25 WRIT=0 198=0 199=0 STARTER=0 KBI=0 CAAV=0 L.TOURNIER=0
(& cs!£UX,X-X1XXEXOXVXXjXqXXXXXXXXXXXEX&acdfgishgilnopqutuxxyZw9yvc)W
JUMPS The aspe£ct of a computer that makes itmore than a calculator is i
ts ability tochange its sequence of operations as aresult of earlier instruct
ions. Withinthe Z80 there is a counter called theProgram Counter or PC.
This counterkeeps track of which "instruction theprocessor is to perfor
m next. Bymodifying its contents, the processorcan be jumped to any
instruction inmemory. The simplest jump is JP nn, where nn isthe address to whi
ch the program is tojump. This is an unconditional jump, theProgram Counter al
ways jumping to theaddress nn.£ The more powerful jump is theconditi
onal jump. The processor teststhe state of a flag, before eitherjumping
or continuing in sequence. The conditional jumps involving thecarry and ze
ro flags are-JP NC,nn jump if carry flag not setJP C,nn jump if carry fla
g setJP NZ,nn jump if zero flag not setJP Z,nn jump if zero flag set In
direct jumps are also available onthe Z80 using the HL register pair.The
instruction JP (HL) loads theprogram counter with the contents of theHL
register. Thus the address of thenext instruction to be performed iscon
tained within the HL register.£Since the contents of the HL registerpair ca
n be the&- result of somecalculation the jump can be conditional.£ Summa
ry - jumpsJP nnJP (HL)JP NC,nn jump on no carryJP C,nn jump on carryJP NZ,nn
jump on not zeroJP Z,nn jump on zero£ EXAMPLES OF JUMPS Although you
can enter the addresswithin the jump in number form, if itdoes not equal
the address of the startof an instruction, the simulator willstop at the J
UMP. This is because theprocessor would perform the instructionit finds at
that address and anythingcould hap&pen and usually does. To get round this prob
lem use a label,declaring it in the label column infront of the instructi
on to which youwish to jump.£ LD HL,STORE LD A,3 LOOP1 LD (HL),A INC A CP 8
JP NZ,LOOP1 LOOP2 DEC (HL) JP NZ,LOOPq2 RET STORE DEFB 0
RELATIVE JUMPS One difficulty with the above types ofjump is that, if the
start address ofthe program were changed, all the jumpaddresses would requ
ire modification.Relative jumps do not have thisdifficulty. The absolu
te address is notstored with the instruction. It is thedifference between th
e current contentsof the program counter and the addressto which we wish to j
ump that is storedwithin the instruction. Relative jumpsare lijmited to jump
ing backwards 128locations and forwards 127 locations. The mnemonic for relat
ive jumps is JRand can take all the forms discussed sofar for JP, i.e. JR , JR
NC, JR C, JR NZand JR Z.£ There is one particular relative jumpinstruction th
at is particularly usefulnamely Decrement and Jump on Non-Zero,or DJNZ. The
B register is decrementedand, if the result is not zero, theprocessor per
forms a relative jump tothe computed new address. If the resultis zero then
the next instZMruction insequence is taken. DJNZ allows us torepeat a ser
ies of instructions a presetnumber of times. The number of repeatsis equal t
o the contents of the Bregister when the loop is entered, solong as th
e B register does not formpart oQf the series of instructions. No flags are
affected by any jumpinstructions including DJNZ.£ Summary - relative jumpsJR
e where e is the displacement inJR NC,e the range 127 to -128JR C,eJR NZ
,eJR Z,eDJNZ e decrement and jump on non zero£ EXAMPLE OF RELATIVE JUMP
S All assemblers calculate the displace-ment for relative jumps. The assemble
rwithin this TUTOR is no exception.Relative jumps should be entered wit
hlabels.£ LD HL,STORE LD B,(HL) INC HL LD E,(HL) LD HL,0 LD D,0 LOOP ADD H
L,DE DJNZ LOOP LD (ANS),HL RET STORE DEFB 6 DEFB 58 ANS DEFW 0
EXAMPLE OF RELATIVE JUMPS This example illustrates a method ofmultiplication
. There are other fastermethods that will be shown later.£ LD A,1 LOOP1 ADD A,
A LD (STORE),A JR NC,LOOP1 INC A LD B,7 LOOP2 ADD A,A LD (STORE),A INC A
LD (STORE),A DJNZ LOOP2 RET STORE DEFB 0 THE STACK The St
ack is an area of external RandomAccess Memory, that is used as a seriesof regi
ster pairs, in conjunction with aStack Pointer. The Stack Pointer (SP) isis sing
le double length register withinthe Z80, capable of holding up to 65335. Before
loading the Stack from anyinternal register pair, the StackPointe
r is decremented twice, ( thuspointing to the next pair of memorylocati
ons). The contents of the registeris then loaded into the Stack indirectlyusing
the SP register as the address. The instruction is PUSH dd. Continuingto PUSH
data on to the Stack results inthe data being pushed in at the bottomof the
Stack and the Stack Pointerworking its way down through memory.£ POP dd ret
rieves data from the Stackinto the defined register pair. Theregister p
air is loaded Fuwith thecontents of the memory location pointedto by SP r
egister. Then the SP is inc-remented twice. Continuing to POP data from the
Stackresults in information being POPped fromthe bottom of the Stack and the
StackPointer working its way back up throughthe memory. If a series of regist
ers is PUSHed onto the Stack, and subsequently POPpedoff the Stack, they
reappear in thereverse order. The BC, DE and HL registers may bePUSHed on
to and POPped from the Stack.The Accumulator mzay also be PUSHed on tothe Stac
k, but this is done with theflag register F, which will be discussedlater.£ T
he Stack Pointer can take part ina number of instructions alreadydi
scussed. They are simply those in which DE, orBC can take part. The ins
tructionequivalent to EX DE,HL is howeverEX (SP),HL , that EXchanges the
contentsof the bottom of the Stack with the HLregister.£ Summary - the Stack a
nd SP register PUSH DD where DD is AF, BC, DE, or HL. From now £1o
n dd can be considered as representing BC, DE, HL,or SP.
POP DD LD SP,nn LD SP,(nn) LD (nn),SP LD SP,HL ADD HL,SP ADC HL,SP SBC HL,SP INC
SP DEC SP EX (SP),HL£ EXAMPLES USING THE STACK The simulator uses the um
emory area 3840to 4095 for the pupils programs. TheStack Pointer is initiall
y set to 4094,and works its way down towards theprogram area. Keep the SP
at the top endof this area of memory to ensure thatthe simulator does not st
op. The last Wfour pairs of memory locationsin the Stack are displayed at the bo
ttomright hand corner of the screen. As withthe Program Counter, the positio
n towhich the Stack Pointer points is shownin Red. The instruction INC SP is
included atthe end of the program to ensure that SPis displayed. The actual valu
e in the SPregister is immaterial for most of itsapplications.£ LD HL,56789 L
D DE,34567 LD BC,12345 PUSH HL PUSH BC PUSH DE EX (SP),HL LD BC,0 POP DE
POP BC POP HL RET INC zSP CALLS TO SUBROUTINES A subroutine
is a part of a programthat is called from the main program andonce completed
returns back to the mainprogram. The subroutine is usuallycalled from a
number of places in theprogram. The ZR80 allows this feature by theinstr
uction CALL. The CALL instructionis similar to the JP instruction exceptthat
the address of the next sequentialinstruction, held in the PC register, isPUSHe
d onto the Stack, prior to the jump The return instruct'ion RET, POPs theretu
rn address from the Stack, back intothe PC register, to continue where themain
program left off. If the number ofPUSHes and CALLs in the subroutine doesnot
equal the number of POPs andRETurns, obviously this will not happen.£ Bo
th conditional and unconditionalCALLs and RETurns are available on theZ80
. All four types of conditionsalready considered ( NC, C, NZ and Z )can
be used with CALLs and RETurns.£ Summary - calls and returns CALL NC,nn
RET NC No Carry CALL C,nn RET C Carry set CALL NZ,nn RET N
Z Not Zero CALL Z,nn RET Z Zero set If the condition is not
met, theprogram will not CALL the subroutine orRETurn from it.£ EXAMPLE O
F CALLS TO SUBROUTINE It must be remembered that a subroutinemay require the use
of a register whosecontents are still required in the mainprogram. Its conte
nts must therefore bePUSHed onto the stack or otherwisestored elsewhere,
and retrieved at theend of the subroutine. The following example adds together
thefirst 32 pairs of memory locations. Theresult is left in HL. The stack and
theHL registers are both used as storageinspite of the interference of the CA
LL,by using the EX (SP),HL instruction£ LD HL,0 LD B,32 PUSH HL LOOP1 LD E,(HL
) INC HL LD D,(HL) INC HL EX (SP),HL CALL SUBR EX (SP),HL DJNZ LOOP1 POP
HL RET SUBR ADD HL,DE RET EXAMPLE OF CONDITIONAL CALLS This simple
example counts up thenumber of memorgy locations holding anumber above
192 and below 64 in thefirst 32 memory locations.£ LD HL,0 LD DE,0 LD B,32
LOOP LD A,(HL) CP 193 CALL NC,ABOVE CP 64 CALL C,BELOW INC HL DJNZ LOOP
RET ABOVE INC E RET BELOW INC D RET . Lessons 10 - 17 10. Cond
itional and unconditional JPs Ex - jumps 11. Relative jumps Ex -
relative jumps 1 Ex - relative jumps 2 12. The Stack Ex - pushe
s and pops 13. Calls to subroutines Ex - u-nconditional calls & rets
Ex - conditional calls 14. Binary notation Ex - binary notation 15.
Hexadecimal notation Ex - hex notation 16. Binary Coded Decimal notatio
n Ex - BCD notation 17. Positive and negative notation Ex - +ve
and -ve numbers Load further lessons from tape£ INTRODUCTION The pr
ocessor, under the programmer'sdirection, has the capacity to makedecision
s. In the following lessons weshall discuss these instructions that6make a
computer more than just acalculator. We shall then look at numbers hel
d inregisters in more detail.£ BINARY NOTATION If we were to take th
e top off a Z80chip and, using a powerful microscope,look at a register, we
would see that itconsists of 8 cells. These cells arecapable of being switc
hed between twodifferent states. Conventionally wedesignate one state as
"1" and the otheras "0". The pattern of 1's and 0's couldbe 10111000 say. How d
o we interpret thiSqs pattern Theanswer is, anyway we like. In thislesson
we show that this pattern couldbe 184,-72, B8H, and even CP B. The onlyone th
e processor has built into it isthe latter.£ Each digit in a number can b
e con-sidered to have a weighting. F,&or decimalnumbers these weightings are Di
git 3 2 1 0 1000 100 10 1 since each digit can
have one of tenstates, designated 0 - 9. In a register each digit or bit ha
sonly two states. Therefore we caninterpret the digits as having weight
-ings of bit 7 6 5 4 3 2 1 0 128 64 32 16 8 4 2
1 Taking our number 10111000 for exampleand noting that bits that are
"0"contribute nothing to the number, thedecimal equivalent of 10111000 is g
ivenby 128+32+16+8184.£ The maximum number that can be held inan 8 b
it register is 128+64+32+16+8+4+2+1255This is the number we originally
assumedat the beginning of our discussion.£ Just as we add two Rdecimal num
berstogether, carrying one forward if thesum of two digits is greater than 9
, wecan add two binary numbers. If the sumis above one, a one is carried forwa
rd.i.e. carry ' ' ' ' 0 1 1 0 1 1 1 0 + 0 0 1 0
08 1 0 1 gives 1 0 0 1 0 0 1 1 Similar we can perform subtraction.i.e. bor
row 0 1 1 2 0 2 0 1 1 0 0 1 1 0 - 0 0 1 0 1 1 0 1 gi
ves 0 0 1 1 1 0 0 1£ EXAMPLES OF BINARY NOTATION The assembler, withi
n this tutor, hasone instruction not normally found in anassembler, namely BI
N. The assemblerallocates one memory location to theline, which would norm
ally be labelled.It constantly displays this location inbinary form. The numbe
r after BIN is thenumber initially inserted into thelocation. After going
through the followingexample try modifying the displaying ofSTORE in exam
ple 11B.£ LD HL,STORE LOOP DEC (HL) JR NZ,LOOP LD A,(NUM1) LD HL,NUM2 ADD A
,(HL) LD (ANS),A RET STORqE BIN 15 NUM1 BIN 81 NUM2 BIN 95 ANS BIN 0
HEXADECIMAL NOTATION Binary numbers are too cumbersome anddecimal
too inconvenient to displaymultiple register numbers. A method ofpresenti
ng binary numbers has beendevelqoped to get round these problems.Instead
of basing the number on 10 as indecimal or 2 as in binary, we base it on16. Th
is numbering system is calledHexadecimal. We require 16 different symbo
ls torepresent a digit. 0-9 gives us thefirst E10 and A-F the final 6.
A listof decimal, binary, and hexadecimalequivalents are given on the
nextscreen.£ Decimal Binary Hexadecimal 0 0000 0
1 0001 1 2 0010 2 3 0011
3 4 0100 4 5 0101 5 6 01
10 6 7 0111 7 8 1000 8 9
1001 9 10 1010 A 11 1011 g B
12 1100 C 13 1101 D 14 1110
E 15 1111 F£ All 16 states of the 4 binary bits arecover
ed by 0-F. Hence only 2 hexadecimaldigits are required to display theconte
nts 7 of an 8 bit register. Ourexample 10111000 divides up into101
1 1000 or B8 Hex. A double registerholding say 11001001 10111000 will berep
resented by C9B8 hex. Conversion of a hex number to itsdecimal equivalent
follows the standar2dcalculation.i.e. B8 hex (B hex)* 16+ (8)* 1
11*16+8184 Always remember that a hex number has abase of 16 decimal, a decimal
number hasa base of 10 and a binary number a basebase 2.£ EXAMPLES OF HEXAD
ECIMAL NOTATION Now that hex notation has been intro-duced we can discuss ho
w the computerstores programs in more detail. Asalready mentioned, the
instructionsare stored memory as numbers. Someinstructions only req
uire a singlenumber, others require more.F Column 2 onthe Simulator display sh
ows the memorycontents for the instructions in hex. All the numbers used to
describe aninstruction are given in sequence alongthe line. Notice that numb
ers called upin an instruction appear towards the endof the string of numbers.
The earliernumbers determine the type ofinstruction. Since the tot
al number ofinstructions exceed 256, a prefixnumber is used to produce
other sets ofinstructions. The prefixes you will findare ED, CB, DD and FD.£ Luc
kily assemblers takes account of allthese complexities, and you will notneed
to learn which numbers representwhich instructions. The Simulator can be s
witched betweendecimal and hexadecimal display bypressing shift "T", whe
n a program isnot running.£ LD A,25H ADD A,A DAA LD HL,4589H LD DE,3812H L
D A,L SUB E DAA LD L,A LD A,H SBC A,D DAA LD H,A RET BINARY COD
ED DECIMAL NOTATION We would still like to be able toperform calculations
on decimal numberswithout having to convert to binary orhexadecimal form. Hex
idecimal form holdsa key to a method of achieving this. The hex digit requires
adjustment toavoid the digits A-F. Adding 6 to thedigit, if these symbols a
ppear, resultsin correct adjustment. Take the hex number C ( 12 dec.).Addi
ng 6 gives 18 decimal or 12 hex.Hence the hex number looks identical tothe
decimal answer required.£ Each digit is held in 4 bits of theregister. The
se 4 bits are called anibble, the whole 8 bit word is termed abyte. Who said
programmers have no senseof humour This presentation is termed BinaryCoded
Decimal or BCD. The Z80 accommodates the aboveadjustment, with the ins
truction DAA,or Decimal Adjust Accumulator. Thisinstruction is used af
ter an 8 bitADD, ADC, SUB, or SBC to adjust theAccumulator contents by a
dding 6 to thenibble, if either nibble in the answeris above 9.£ To perform
this operation the Z80 usestwo further flags, the H flag (C a Halfcarry betwe
en nibbles ), and N flag(subtract instruction performed last).Since these
flags cannot be tested aspart of a conditional jump etc. they areof little us
e.£ EXAMPLES OF B.C.D. NOTATION These examples show simple addition andrusub
traction in BCD format. Remember tokeep in Hex display mode or theill
ustrations will not appear in BCD.£ LD A,25H LD HL,STORE LD DE,2468H INC (HL)
RET BIN 65H BIN 87H BIN 9AH BIN DFH BIN FFH BIN 64H STORE DEFB 64
POSITIVE AND NEGATIVE NUMBER NOTATION So far we have only dealt with positiv
enumbers. If we had taken 6 from 5 wewould end up with the answer 255 wit
hcarry set. There is an interpretation ofnumbers that allows us to consider thi
sanswer as the negative number -1. In this interpretation -1 must equal255 or
11111111, or the processor wouldnot be able to take 6 from 5 and getthe ri
ght answer. Further 5-7 -2 or 254or 11111110. Bit 7, the most significantbit, re
presents the sign ( + oQr - ) ofthe number. When bit 7 is "1" the numberis neg
ative, and when "0" the number ispositive.£ A useful operation would be to ma
ke apositive number negative. Changing bit 7does not do this. Take the posi
tivenumber 2 or 00000010 and its negativeequivalent -2 or 11111110 for exam
ple.Inverting all bits of the binary numberof +2 gives 11111101, which is 1
lessthan that for -2.Hence to make a positive number negativewe invert all its
binary bits, known asComplimenting, and add 1. The nzhotationis generally ter
med 2s complement£i.e. 0 0 0 0 0 1 0 1 +5 invert 1 1 1 1 1 0 1 0
add 1 1 1 1 1 1 0 1 1 -5 invert 0 0 0 0 0 1 0 0 add 1 0 0 0
0 0 1 0 1 +5 The operation luckily also makes anegative number pos
itive. A veryimportant point. The largest positive number we can holdin a
single register, using thisnotation is 01111111 or 127 and thelargest
negative number 10000000 or-128.£ The Z80 has two instructions that maybe
-used for these operations CPL complements or inverts the conten
ts of the Accumulator. NEG negates, or makes negative, the contents o
f the Accumulator by complementing and adding 1 in one operation.
A Sign flag FR(S) is provided on the Z80.It duplicates the sign ( bit 7 ) of th
eanswer after any arithmetic operation onthe Accumulator. The sign flag is "0
"for a positive result and "1" for anegative result.£ When performing arit
hmetic operationswhich we wish to interpret within therange -128 to +127, t
he Carry flag nolonger signals an out of range result.However another flag,
the overflow (P/V)flag does. It is a "1" whenever theanswer is outside the
range -128 to +127and "0" within the range. It iseffectively a carry
into bit 7 whichwould make the sign bit incorrect.£ There is no reason for
sticking to 8bits using this method. So long as thenumber of bits is suffici
ent and themost significant bit is taken as thesign bit any size positiv
e or negativenumber can be represented. Performing a similar calculation to thea
bove we can show that a register paircan represent a number in the range+
32767 to -32768. The Sign and overflow flags are alsooperative after AvDC an
d SBC instructionon the HL register. It reflects the 15thbit (or bit 7 of H regi
ster) .£ It is important to remember that theZero, Carry, Sign, and overfl
ow flagsare always operative after an 8 bitarithmetic instruction or a
16 bitaddition involving the Carry. Yourinterpretation of the result de
terminesin which flag(s) you should beinterested in.£ EXAMPLES OF +
VE AND -VE NOTATION Although these examples appear to beall positive, they ca
n be viewed equallyas nee%gative where appropriate and theSign and overfl
ow flags observedoperating. Remember a number above 128 isnegative.
Since all the negative numbersin the examples are small, they can beseen quic
kly and simply be converted bysubtractinSg the number from 256. i.e. -2 is eq
uivalent to 254 etc.£ LD A,254 NEG NEG ADD A,2 INC A LD HL,2 LD DE,FFFEH
ADD HL,DE CPL LD HL,STORE LD (HL),7FH INC (HL) RET STORE BIN 0 88($"88(
H0$ff$/ yyyyyyy1ve "TEXT1",B,&5800,&55000TER"ad00179,&ed,&78,&cb,&47&1b,&7a,&B3
f,&0mW# # UX&X'X+X2X9XXDXKXRXbXiXyXXXXXXbYXUa/cddevfmgijlmjnopsOurwxyzI! EX
AMPLES OF BIT MANIPULATION The following illustrates the way inwhich SET, RE
S, and BIT can be used tomanipulate individual bits of a registeror memory loca
tion.£ BIT MANIPULATION We have so far treated information inthe fo
rm of bytes or words. The Z80 doesallow a number of operations on separateor gro
ups of bits within one byte Any bit in a register, or memorylocation usin
g (HL), can be SET to a"1". We can also RESet any bit to a "0".To test the
state of a bit in aregister, or memory location, we can usethe instructi
on BIT. In this instructionthe Zero flag is set if the appropriatebit is "0"
and reset to a "0" if theappropriate bit is "1". Hence we canproduce our o
wn flags to indicate eventsand then act upon them later in ourprograms.£ Su
mmary - bit manipulationSET N,ir where N is the bit number 0-7SET N,(HL)RES N
,rRES N,(HL)BIT N,rBIT N,(HL)£ LD HL,STORE SET 6,(HL) LOOP INC (HL) BIT 2,(HL
) JR Z,LOOP RES 3,(HL) LD B,5 SET 7,B RES 2,B DEC B BIT 5,B RET Z STOR
E BIN 16 LOGICAL INSTRUCTIONS There are three logical instructio
nsavailable on the Z80. They are allperformed on a bit by bit basis betwe
enthe Accumulator and a number, register,or indirectly addressed memory locati
on(HL). The result is left in theAccumulator. In the AND instruction, i
f a bit in theAccumulator AND other number are "1",then the corresponding bit
in the resultwill be "1". If not it will be "0" i.e. 01101100 01
010110 ANDed together gives 01000100 As w'ell as performing ANDs on our
ownflags, this instruction is useful inmasking off areas of words, or resett
inggroups of bits in the Accumulator.£ In the OR instruction, if a bit in theAc
cumulator OR in the other number is a"1", the corresponding bit in the resultwi
ll be "1". If not it will be "0" i.e. 01101100 01010110 ORed to
gether give 01111110 As well as performing OR operations onour own flags
, this instruction isuseful in SETting a group of bits in theAccumulatHor.£
In the XOR (eXclusive OR) instruction,if the bit in the Accumulator is thes
ame as that in the number , then thecorresponding bit in the result will be"
0". If they are different it will be"1". Another way of looking at the XORi
nstruction is if one OR the other is"1" but NOT both, the answer will be"
1". i.e. 01101100 01010110 XORed together give 00111010 A
part from performing the logical XORfunction on our own flags the XORin
struction is useful in invertingindividual or groups of bits.£ The three l
ogical instructions AND, OR,and XOR affect the Zero, Sign, andParity flags
. The Carry flag is reset to"0" in all cases. Thus the limitation ofno Clear
Carry instruction can beperformedl by a logical instruction. AND A or OR A w
ill clear the carry flagand not affect any registers. XOR A willclear Carry and
the Accumulator.£ Summary - logical instructions AND n AND r AND (HL) OR n OR r
OR (HL) XOR n XOR r XOR (HL)£ EXAMPLEoS OF LOGICAL INSTRUCTIONS The examples
illustrate the operationof the logic instructions. The pupilshould test
his/her understandingfurther by modifying the contents of the3 stores.£ LD
HL,ST2 LD A,(ST1) AND (HL) LD (ST3),A LD A,(ST1) OR (HL) LD (ST3),A LD A,
(ST1) XOR (HL) LD (ST3),A RET ST1 BIN 65H ST2 BIN FH ST3 BIN 0H
SHIFT INSTRUCTIONS A shift instruction is one in which thebits of a re
gister or memory locationare moved sideways, left or right to theadjacent bit.
As we shall see, thisgives us a means of division as well asmultiplication
.£ The SRA r, and SRA (HL) instructionsshift the register/memory location (H
L)right, shifting bit 0 into the Carryflag and retaining the statYe of bit 7
. i.e. 7 6 5 4 3 2 1 0 C 0 1 1 0 0 0 1 0 x (98 dec.) becomes 0
0 1 1 0 0 0 1 0 (49 dec.) or 1 1 1 0 0 0 1 0 x (-30 dec.)becomes 1
1 1 1 0 0 0 1 0 (-15 dec.) Hence the SRA or Shift RightArithmetica
l8ly instruction divides bothpositive and negative numbers by 2.£ The SRL r,
and SRL (HL) instructionsshift the register/memory locationcontents right
, shifting bit 0 into theCarry flag and a "0" into bit 7. i.e. 7 6 5 4 3 2 1
0 C F51 0 1 1 0 1 1 1 x (183 dec.)becomes 0 1 0 1 1 0 1 1 1 (9
1 dec.) and Carry The SRL or Shift Right L
ogicallyinstruction therefore divides a positivenumber by 2. As with SRA the Ca
rry flagindicates the half.£ Theq SLA r, and SLA (HL) instructionsshift the
register/memory contents leftshifting a "0" into bit 0 and bit 7 intothe Carry f
lag. i.e. C 7 6 5 4 3 2 1 0 x 0 1 1 0 0 0 1 0 (98 dec.)becomes
0 1 1 0 0 0 1 0 0 (196 dec.) Hence the result of the instruction SLAor Shif
t Left Arithmetically is tomultiply the positive number by 2. TheCarry in
dicates a result greater than255.All these instructions affect not onlythe C
arry flag, but the Zero, Sign, andParity flags.£ Summary - shift instructions S
RA r divides +ve and -ve numbers by 2 SRA (HL) SRL r divides +ve numbers 0 - 2
55 by 2 SRL (HL) SLA r multiplies +ve and -ve numbers
by 2 SLA (HL)£ EXAMPLES OF SHIFT INSTRUCTIONS The6 three shift
instructions areillustrated using a fixed initial valuein the memory locatio
n STORE.£ LD HL,STORE LD B,5 LOOP1 SRA (HL) DJNZ LOOP1 LD (HL),A5H LD B,5 LO
OP2 SLA (HL) DJNZ LOOP2 LD B,8 LOOP3 SRL (HL) DJNZ LOOP3 RET £M STORE BIN 6
9H ROTATE INSTRUCTIONS These instructions are shift instruct-ion
s in which the bit that falls out oneend of the register or memory locationis
pushed back into the other end. TheCarry flag either forms part of thenum
ber shifted, thereby making it 9 bitslong, or duplicates the state of the bittha
t fell out of the register. There aretherefore four different types ofrot
ate.£ RLC r, and RLC (HL) (namely Rotate LeftCarry duplicating ), shifts the con
tentsleft, bit U7 rotating into bit 0, and theCarry duplicating the transferred
bit. i.e. C 7 6 5 4 3 2 1 0 x 1 0 1 1 0 0 0 1becomes 1 0 1 1 0 0
0 1 1 old bit 71 RL r, and RL (HL) Rotate Left, rotatesthe register/memory lo
cation with theCarry as ia 9th bit, left. i.e. C 7 6 5 4 3 2 1 0 c
1 0 1 1 0 0 0 1becomes 1 0 1 1 0 0 0 1 c cold Carry RL instructions can be
strung togetherto multiply any length number by 2,since the Carry is tra
nsferred betweenrepeated RL instructions.£ RRC r, RRC (HL) instructions (Rota
teRight Carry being duplicated) is similarto the RLC instruction but is a rig
htshift. Bit 0 is shifted into bit 7 andthe Carry duplicates the old bit 0. i.
e. 7 6 5 4 3 2 1 0 C 1 0 1 1 0 0 0 1 xbecomes 1 1 0 1 1 0 0 0 1
old bit 01 RR r, and RR (HL) instructions ( RotateRight ) is similar to RL excep
t that theshift around the 9 bits is to the right. i.e. 7 6 5 4 3 2 1 0 C
1 0 1 1 0 0 0 1 cbecomes c 1 0 1 1 0 0 0 1 cold Cfjarry RR instruction
s can be strung togetherto divide any length number by 2.£ RLC and RRC instruc
tions are useful insequentially interrogating the wholecontents of a registe
r without corrupt-ing its contents. All the above rotate instructions RLC,RL,
RRC, and RR not only affect theCarry flag but also the Zero, Sign andPari
ty flags, as have all shiftinstructions discussed. There are 4 other
rotate instructionsthat involve the Accumulator only. Theyare RLCA, RLA, RRCA
, and RR#gA. They areidentical to RLC A, RL A, RRC A, andRR A, but only aff
ect the Carry flag,and are twice as fast.£ Summary - rotate instructions RLC r
rotate r left, carry duplicates RLC (HL) RLCA rotate A left, carry duplica
tes RL r rotate r and carry left RL (HL) RLA rotate A and carry left RRC r
rotate r right, carry duplicates RRC (HL) RRCA rotate A right, carry duplicat
es RR r rotate r and Carry right RR (HL) RRA rotate A and Carry right£
EXAMPLES OF ROTATE INSTRUCTIONS These examples illustrate the operationof rota
te instructions. Modify theinitial condition of the location STOREto inves
tigate their operation further.£ LD HL,STORE LD B,8 LOOP1 RLC (HL) DJNZ LOOP1
LD B,8 LOOP2 RL (HL) DJNZ LOOP2 LD B,8 LOOP3 RRC (HL) DJNZ LOOP3 LD B,8 LOO
P4 RR (HL) DJNZ LOOP4 RET STORE BIN 69H EXAMPLE USING ROTATE AND SHIFT T
his example uses shifts and rotateinstructions to multiply two 8 bitnu
mbers together. One number is rotatedto examine each bit in turn. The othernu
mber is also shifted and added to thetotal if the bit is set. This method isfa
r quicker than the method of repeatedaddition.£ LD HL,0 LD DE,(NUM2) LD A,(NU
M1) LOOP RR A JR NC,JP1 ADD HL,DE JP1 RET Z SLA E RL D JR LOOP NUM1 D
EFB 212 NUM2 DEFB 203 DEFB 0 DECIMAL ROTATE The Z80 allows
us to rotate left andright nibbles as well as bits. RLD Rotates the Decimal n
umber Left RRD Rotates the Decimal number Right Th e best way to descri
be theseoperations is by example. Bothinstructions involve the Acc
umulator,and the memory location (HL). Theexamples are in Binary Coded D
ecimal ofcourse, each digit taking up one nibbleor four bits of tnhe register
or memorylocation.£ A after (HL) A before
5 4 x 3 after RLD x 5 4 3where x is any number and is unaffec
tedby the instruction. As can be seen the effect of stringingtogether RLD instr
uctions is to multiplya decimal number by 10. It is alsouseful in isolatin
g the high digit fromthe two digit number.£ A after (HL) A bef
ore x 5 4 3 after RRD 5 4 x 3 The RRD ins
truction therefore dividesthe decimal number by 10. It can also bestrung togethe
r to divide any length BCDnumber by 10. The low digit of the twodigit decimal
number can be isolated bythis instruction.£ Summary - decimal shiftsRLD Rota
te Left Decimal (*10)RRD Rotate Right Decimal (/10)£ EXAMPLES OF DECIMA
L ROTATION These examples illustrate themultiplication and divisio
n of BCDnumbers by ten.£ LD HL,STORE LD A,0 RLD INC HL RLD LD A,0 RRD
DEC HL RRD RET STsORE DEFW 254H INTRODUCTION This group
of lessons will introducethe idea of bit manipulation and its usein flag op
erations and in producingfaster methods of multiplication. But first we shal
l look further at theprocessors fl4ags.£ LESSONS 18 - 25 18. Parit
y 19. The flag register and AF 20. S and P/V flags in instructions
Ex - sign and parity flags 21. Bit manipulation Ex - bit manipulati
on 22. Logical instructions Ex - logical instructions 23. Shift inst
ructions Ex - shift instructions 24. Rotate instructions Ex
- rotate instructions 1 Ex - rotate instructions 2 25. Decimal rotat
ing Ex - decimal rotation Load further lessons from tape£
PARITY When data is transmitted from one placeto another, it is possible for
errors toappear in the received data. Parity is asimple way of detecting single
errors indata. An additional bit is added to thedata that makesI the total num
ber of "1"sin the word an even number. If thereceived word does not ha
ve an evennumber of "1"s in it, then an error hasoccurred. In addition to
this evenparity we could use odd parity, wherethe word is made to have an
odd numberof "1"s in it. The Z80 has a flag that is set if thenumber of "1"s
in a number is even. Thisflag is in fact the same flag as theoverflow flag.
It is termed the P/Vflag.£ i.e.0 0 1 1 0 1 0 0 parity flag is not set
s'ince number of "1"s is 3. i.e. odd.0 1 0 0
0 1 1 1 parity flag is set since number of "1"s
is 4. i.e. even. The instruction performed determinesthe meaning
of the P/V flag. Of all w$the instructions described todate only DAA treat
s it as a parityflag. All others either have no effecton it or use it as a
n overflow flag.All subsequent instructions either haveno effect on it or use
it as parity.£ THE FLAG REGISTER AND AF REGISTER PAIR We have discussed flags
as individualbits. This is the way they are normallyused. They are however a
ctually storedin the Z80 in a register, designated asF or flag register. Th
e flags arearranged as follows - bit 0 C JCarry bit 1 N
Subtract last bit 2 P/V Parity and overflow bit 3 Not use
d bit 4 H Half carry bit 5 Not used bit 6 Z Z
ero bit 7 S Sign£ The Flag register sometimes forms 1 aregister
pair in conjunction with theAccumulator. This pair is called AF. Theonly instr
uctions previously mentionedthat involve this register pair are PUSHand POP.£
S and P/V FLAGS IN INSTRUCTIONS The sign and parity flags can be usedin a
ljl absolute ( NOT relative) jumps,calls, and returns. The notation is - JP PO,
nn CALL PO,nn RET PO Parity odd0 JP PE,nn CALL PE,
nn RET PE Parity even1 JP P,nn CALL P,nn RET P
Sign +kCve JP M,nn CALL M,nn RET M Sign -ve If the condition is not met th
e programwill not jump, call a subroutine, orreturn.£ EXAMPLE OF JUMP
ON SIGN This example is a simple program toillustrate JP P,nn , and JP M,n
n jumpif positiveh and jump if minus. Note thatthe carry is still operativ
e, andtherefore, if you do not clear it beforeADC and SBC the later jump c
ould beunexpected. In this example the carry isnot cleared, so "look before you
leap".£ LD HL,52 LD DE,33 LD B!oC,5 LOOP1 SBC HL,DE LD (LREG),HL JP P,LOOP1
LOOP2 ADC HL,BC LD (LREG),HL JP M,LOOP2 RET Z JR LOOP1 LREG BIN 0 HREG
BIN 0 berepresented by C9B8 hex. Conversion of a hex number to itsdeci
mal equivalent follows the standar dcalculation.i.e. B8 hex (B hex)* 16+ (8)*
1 11*16+8184 Always remember that a hex number has abase of 16 dec
imal, a decimal number hasa base of 10 and a binary number a basebase 2.£ EX
AMPLES OF HEXADECIMAL NOTATION Now that hex notation has been intro-duced we
can discuss how the computerstores programs in more detail. Asalready
mentioned, the instructionsare stored memory as numbers. Someinstructio
ns only require a singlenumber, others require more.F Column 2 onthe Simul
ator display shows the memorycontents for the instructions in hex. All the nu
mbers used to describe aninstruction are given in sequence alongthe line. N
otice that numbers called upin an instruction appear towards the endof the strin
g of numbers. The earliernumbers determine the type ofinstruction.
Since the total number ofinstructions exceed 256, a prefixnumber is us
ed to produce other sets ofinstructions. The prefixes you will findare ED, CB,
DD and FD.£ Luckily assemblers takes account of allthese complexities, and yo
u will notneed to learn which numbers representwhich instructions. The Simul
ator can be switched betweendecimal and hexadecimal display bypressing s
hift "T", when a program isnot running.£ LD A,25H ADD A,A DAA LD HL,4589H
LD DE,3812H LD A,L SUB E DAA LD L,A LD A,H SBC A,D DAA LD H,A RET
BINARY CODED DECIMAL NOTATION We would still like to be able toperfor
m calculations on decimal numberswithout having to convert to binary orhexade
cimal form. Hexidecimal form holdsa key to a method of achieving this. The hex
digit requires adjustment toavoid the digits A-F. Adding 6 to thedigit, if
these symbols appear, resultsin correct adjustment. Take the hex number C
( 12 dec.).Adding 6 gives 18 decimal or 12 hex.Hence the hex number looks i
dentical tothe decimal answer required.£ Each digit is held in 4 bits of the
register. These 4 bits are called anibble, the whole 8 bit word is termed a
byte. Who said programmers have no senseof humour This presentation is termed
BinaryCoded Decimal or BCD. The Z80 accommodates the aboveadjustment
, with the instruction DAA,or Decimal Adjust Accumulator. Thisinstructio
n is used after an 8 bitADD, ADC, SUB, or SBC to adjust theAccumulato
r contents by adding 6 to thenibble, if either nibble in the answeris above 9
.£ To perform this operation the Z80 usestwo further flags, the H flag (C a H
alfcarry between nibbles ), and N flag(subtract instruction performed las
t).Since these flags cannot be tested aspart of a conditional jump etc. they
areof little use.£ EXAMPLES OF B.C.D. NOTATION These examples show simple ad
dition andrusubtraction in BCD format. Remember tokeep in Hex display mo
de or theillustrations will not appear in BCD.£ LD A,25H LD HL,STORE LD DE,
2468H INC (HL) RET BIN 65H BIN 87H BIN 9AH BIN DFH BIN FFH BIN 64H S
TORE DEFB 64 POSITIVE AND NEGATIVE NUMBER NOTATION So far we have only dea
lt with positivenumbers. If we had taken 6 from 5 wewould end up with the
answer 255 withcarry set. There is an interpretation ofnumbers that allows us
to consider thisanswer as the negative number -1. In this interpretation -1 m
ust equal255 or 11111111, or the processor wouldnot be able to take 6 from 5
and getthe right answer. Further 5-7 -2 or 254or 11111110. Bit 7, the most sig
nificantbit, represents the sign ( + oQr - ) ofthe number. When bit 7 is "1" t
he numberis negative, and when "0" the number ispositive.£ A useful operation
would be to make apositive number negative. Changing bit 7does not do this.
Take the positivenumber 2 or 00000010 and its negativeequivalent -2 or 111
11110 for example.Inverting all bits of the binary numberof +2 gives 111111
01, which is 1 lessthan that for -2.Hence to make a positive number negativewe
invert all its binary bits, known asComplimenting, and add 1. The nzhotationi
s generally termed 2s complement£i.e. 0 0 0 0 0 1 0 1 +5 invert
1 1 1 1 1 0 1 0 add 1 1 1 1 1 1 0 1 1 -5 invert 0 0 0 0 0 1 0 0 a
dd 1 0 0 0 0 0 1 0 1 +5 The operation luckily also makes anegative
number positive. A veryimportant point. The largest positive number we c
an holdin a single register, using thisnotation is 01111111 or 127
and thelargest negative number 10000000 or-128.£ The Z80 has two instruct
ions that maybe -used for these operations CPL complements or inverts t
he contents of the Accumulator. NEG negates, or makes negative, the
contents of the Accumulator by complementing and adding 1 in one
operation. A Sign flag FR(S) is provided on the Z80.It duplicates the sign
( bit 7 ) of theanswer after any arithmetic operation onthe Accumulator. The s
ign flag is "0"for a positive result and "1" for anegative result.£ When p
erforming arithmetic operationswhich we wish to interpret within therange
-128 to +127, the Carry flag nolonger signals an out of range result.However
another flag, the overflow (P/V)flag does. It is a "1" whenever theanswer
is outside the range -128 to +127and "0" within the range. It iseffecti
vely a carry into bit 7 whichwould make the sign bit incorrect.£ There is
no reason for sticking to 8bits using this method. So long as thenumber of b
its is sufficient and themost significant bit is taken as thesign bit a
ny size positive or negativenumber can be represented. Performing a similar calc
ulation to theabove we can show that a register paircan represent a number
in the range+32767 to -32768. The Sign and overflow flags are alsooperative
after AvDC and SBC instructionon the HL register. It reflects the 15thbit (or
bit 7 of H register) .£ It is important to remember that theZero, Carry, Si
gn, and overflow flagsare always operative after an 8 bitarithmetic instr
uction or a 16 bitaddition involving the Carry. Yourinterpretation of
the result determinesin which flag(s) you should beinterested in.£
EXAMPLES OF +VE AND -VE NOTATION Although these examples appear to beall po
sitive, they can be viewed equallyas nee%gative where appropriate and theSign
and overflow flags observedoperating. Remember a number above 12
8 isnegative. Since all the negative numbersin the examples are small, they
can beseen quickly and simply be converted bysubtractinSg the number from 256.
i.e. -2 is equivalent to 254 etc.£ LD A,254 NEG NEG ADD A,2 INC A LD HL,2
LD DE,FFFEH ADD HL,DE CPL LD HL,STORE LD (HL),7FH INC (HL) RET STORE B
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