The Complete Machine Code Tutor (UK) (Face 4) (1985) [Original] [TAPE] [UTILITAIRE].cdt
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00ABE0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00ABF0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00AC00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00AC10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00AC20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00AC30: 00 00 00 00 00 00 00 00 00 00 00 00 00 18 3C 7E ..............<~
00AC40: FF 18 18 18 18 18 18 18 18 FF 7E 3C 18 10 30 70 ..........~<..0p
00AC50: FF FF 70 30 10 08 0C 0E FF FF 0E 0C 08 00 00 18 ..p0............
00AC60: 3C 7E FF FF 00 00 00 FF FF 7E 3C 18 00 80 E0 F8 <~.......~<.....
00AC70: FE F8 E0 80 00 02 0E 3E FE 3E 0E 02 00 38 38 92 .......>.>...88.
00AC80: 7C 10 28 28 28 38 38 10 FE 10 28 44 82 38 38 12 |.(((88...(D.88.
00AC90: 7C 90 28 24 22 38 38 90 7C 12 28 48 88 00 3C 18 |.($"88.|.(H..<.
00ACA0: 3C 3C 3C 18 00 3C FF FF 18 0C 18 30 18 18 3C 7E <<<..<.....0..<~
00ACB0: 18 18 7E 3C 18 00 24 66 FF 66 24 00 00 9E 32 00 ..~<..$f.f$...2.
00ACC0: C9 C9 C9 C9 C9 C9 C9 C9 C9 C9 C9 C9 C9 C9 C9 C9 ................
00ACD0: C9 C9 C9 C9 C9 C9 C9 C9 C9 C9 C9 00 FF 00 00 FF ................
00ACE0: 00 00 00 84 FF FF 00 00 00 3F 88 80 03 00 00 FF .........?......
00ACF0: FF 00 00 00 00 00 00 FF FF 00 08 79 C8 FD 00 FF ...........y....
00AD00: FF 00 00 FF FF 00 08 79 C8 FD 00 FF FF 00 00 FF .......y........
00AD10: FF 00 08 79 C8 FD 00 FF FF 00 00 FF FF 00 00 FF ...y............
00AD20: FF 00 00 00 02 79 C8 FD FF 00 00 FF FF 00 00 FF .....y..........
00AD30: FF 00 00 FF FF 00 04 79 C8 FD 00 FF FF 00 00 FF .......y........
00AD40: FF 00 00 FF DF 00 00 00 08 79 C8 FD FF 00 00 FF .........y......
00AD50: FF 00 00 FF FF 00 00 FF FF 00 10 79 C8 FD 00 FF ...........y....
00AD60: FF 00 00 30 00 76 65 20 22 54 45 58 54 30 22 2C ...0.ve "TEXT0",
00AD70: 42 2C 26 35 38 30 30 2C 26 35 35 30 30 00 30 00 B,&5800,&5500.0.
00AD80: 54 45 52 22 00 61 00 64 00 30 30 31 00 00 37 39 TER".a.d.001..79
00AD90: 2C 26 65 64 2C 26 37 38 2C 26 63 62 2C 26 34 37 ,&ed,&78,&cb,&47
00ADA0: 00 26 31 62 2C 26 37 61 2C 26 42 33 20 00 66 2C .&1b,&7a,&B3 .f,
00ADB0: 26 30 00 FF FF 00 00 FF FF 00 00 FF FF 00 00 8B &0..............
00ADC0: 51 FF FF FF FF Q....
RESULT OF SEARCH :
PRO=55 CHEA=0 COD=5 MUSI=0 COP=11 GRA=19 WRIT=6 198=0 199=1 STARTER=0 KBI=0 CAAV=0 L.TOURNIER=0
PRO=55 CHEA=0 COD=5 MUSI=0 COP=11 GRA=19 WRIT=6 198=0 199=1 STARTER=0 KBI=0 CAAV=0 L.TOURNIER=0
9WUX(X(X,X9XXDXKXXXXcXsXzXXXXXXXXZaacd+eghjkmop$rtwxiyz(S£dkGM1 IND
EX REGISTERS We now introduce two new register.s, theindex registers IX and IY
. These tworegisters are identical in every way.What applies to one app
lies to theother. They can take the place of the HLregister in most i
nstructions. It issimpler to list the instructions thatcan be performed by t
he HL register butnot index registers-ADC HL,dd SBC HL,dd and EX DE,HL aret
he only exceptions. They cannot be exchanged for HL if thatregister pair is on
ly implied in theinstruction, i.e. RRD.£ The great advantage of kthe in
dexregisters however is that indirectaddressing is not simply (HL)
but(IX+d). The indirect address iscalculated as the sum of the conte
ntsof the IX/IY register and the offset dspecified in the instruction. It
is easiEer to use the index registersto interrogate tables than using HL.The
offset can define the column in thetable and IX/IY register point to thebeg
inning of the line. A subroutinecould manipulate the data within thelin
e, using a constant IX/IY pointer.Subsequent lines can then be manipulatedsim
ply by using the same subroutine andchanging the IX/IY register to point toa d
ifferent line.£ The only instruction for which (HL)cannot be substituted
by (IX+d) or(IY+d) is JP (HL). JP (IF(X) and JP (IY)are available however.
The summary lists all instructionsavailable using the IX register. Thisl
ist can be repeated for the IYregister.£ Summary - index registersLD r,
(IX+d) LD IX,nn LD SP,IXLD (IX+d),r LD IX,(nn)LD (IX+d),n LD (nn),IX
EX (SP),IXADD A,(IX+d) INC (IX+d) AND (IX+d)ADC A,(IX+d) DEC (IX+d) OR (I
X+d)SUB (IX+d) XOR (IX+d)SBC A,(IX+d) CP (IX+d)ADD IX,dd IN
C IX DEC IXSLA (IX+d) SRA (IX+d) SRL (IX+d)RLC N(IX+d) RL (IX+d)
RRC (IX+d)RR (IX+d)SET N (IX+d) RES N,(IX+d) BIT N,(IX+d)JP (IX)With an iden
tical set for IY£ EXAMPLE OF USE OF INDEX REGISTER The example uses the IX
register as apointer to a table of two byte numbers.Each number is to be divid
ed by 2.£ LD B,6 LD IX,ITEM1 LOOP SRL (IX+1) RR (IX+0) INC IX INC IX DJNZ
LOOP RET ITEM1 DEFW 560 DEFW 16 DEFW 9634 DEFW 187 DEFW 884 DEFW 5937
THE ALTERNATIVE SET OF REGISTERS The Z80 has within the chip analter
native set of the primary registersAF, BC, DE and HL. These are normallydesig
nated as AF', BC', DE' and HL'.Although no operations can be performedon th
ese registers, they can be used asa fast method of storage. There are on-ly
two instructionsinvolving the alternative registers. EX AF,AF' exchanges t
he contents of AF and AF' EXX exchanges BC,DE and HL, with
BC', DE' and HL' resp.£ EXAMPLE USING THE ALTERNATIVE SET The exampl
e loads all registers, thenswops them with the alternative set.Having re-lo
aded the registers a furtherswop returns the original numbers.£ LD A,30 LD BC,1
024 LD DE,8000 LD HL,64000 EXX EX AF,AF' LD A,60 LD BC,1280 LD DE,200 LD
HL,32100 LOOP EXX EX AF,AF' DJNZ LOOP RET INPUT AND OUTPUT INSTRU
CTIONS So far we have manipulated data withinthe processor and its associated m
emory. If a memory location is used directlyby a external device, the dev
ice istermed memory a,ddress mapped. The Z80also supports 256 output and 25
6 inputports, or 8 bit information sources,external to memory. We can inpu
t data directly into theaccumulator with IN A,(n) where n is thenumber of th
e input port between 0 and255. Similarly we can output data fromthe Accumulato
r to port n using theinstruction OUT (n),A. No flags areaffected by th
ese instructions£ We can also input data to any 8 bitregister using the B
and C registers.The instruction IN r,(C), transmitsp thecontents of the B re
gister to the portwhose number is in the C register. Theport may or may n
ot act upon thisinformation. The returned data from theport is loaded into r
egister r.£ IN r, (C) affect the Zero, Sign, andParity flags. The Eeinstruct
ion IN F, (C)is the only instruction that deals withthe Flag register separatel
y. Only theflags are affected by this instructionand no data is transfer
red into theprocessor. OUT (C), r is a similar instruction toIN r,(C), but
the .contents of theregister r is loaded into port (C). The AMSTRAD CPC 464
uses the IN r,(C)and OUT (C),r forms of I/O instructions,because of the con
figuration of theinterfaces I/O instructions of the formIN A,(n) or OUT (n),
A cannot be used.£ Su!ammary - simple input/outputIN A,(n) where n is the num
ber of the input port (0-255)IN r,(C)IN F,(n)OUT (n),AOUT (
C),r£ EXAMPLES OF INPUT/OUTPUT INSTRUCTIONS On the AMSTRAD all useful I/O addre
ssesare allocated to drive variousperipheral devices, such as the Para
llelInput/Output chip ( PIO ) or CRTController chip etc. The driving
ofthese chips is outside the scope of thisTUTOR. Since erroneous output to t
hesedevices can result in system crash, thisSIMULATOR cannot safely support m
ean-ingful I/O instructions. If the pupilwishes to proceed further in
thisdirection, it is recommended to read theCPC464 FIRMWARE Manual published
byAMSOFT.£ BLOCK INSTRUCTIONS There are four groQups of four types
ofinstructions that perform operations onblocks of memory. Since the
seinstructions have similarities, they areintroduced together. All block instruc
tions use register(s)as a pointer(s) to scan though a blockof memory andW ano
ther as a counter. All block instructions have similarmnemonics. I indi
cates that thepointer(s) are Incremented, D thatthe pointer(s) are D
ecremented, and Rthat the instruction is to be repeateduntil the counter is z
ero.£ The %total list is Transfers LD .....LDI,LDIR,LDD,LDDR Compare CP .....C
PI,CPIR,CPD,CPDR Input IN .....INI,INIR,IND,INDR Output OUT/OT..OUTI,OTDR
,OUTD,OTDR The U in OUT is dropped to keep themnemonic to a maximum of 4 let
ters.£ BLOCK TRANSFER INSTRUCTIONS Block transfer instructions transfer
the contents of an area of memory toanother area. Two pointers are used. The
HL register holds the source address andthe DE register the destination address.
The size of the block to be traoinsferredis held in the BC register.£ LDI tran
sfers (HL) to (DE), incrementsboth pointers, and decrements BC. IfBC0 the P/
V flag is 0 (i.e. equivalentto parity being odd ). If BC does notequal 0 the
P/V flag is 1 (parity even).LDI therefore performs only one step ofthe transfe
r of the block, allowingintermediate operations to be performedbefore the
instruction is repeated. LDIR is similar to LDI, transferringdata from (HL) t
o (DE) and incrementingthe pointers, but this instructiobnautomatically
repeats the operationuntil BC0 and the whole block istransferred.£ LD
D is similar to LDI except that thepointers are Decremented. Thus HL and DEsta
rt at the top of the respectiveblocks of memory. LDDR Repeats LDD untDil
BC0 as in theLDIR instruction. Both pairs of instructions (LDIR andLDDR) ar
e required. Take the example of an LDIR instructionwith the registers initially
set to-HL 1000 DE 1500 and BC 1000.The instruction should transfer t
hecontents of the block of memory 1000-2000 to memory locations 1500-250
0.Unfortunately the first step transfersthe contents of 1000 to 1500. By t
hetime it is the turn of location 1500 tobe transferred it has already be
enoverwritten in th3e first step.£ Taking the initial conditions -HL 1999 DE
2499 and BC 1000 andusing the LDDR instruction, the sameblock will be t
ransferred to the samememory locations without this problem. In general, if t
he two blocks overlapuse the instruction that ensures theinitial figure in
the HL register lieswithin the block to which data is to betransferred.£ Summa
ry - block transferLDI pointer incrementedLDIR pointer incremented and re
peated until number found or BC0LDD pointer decrementedLDDR pointe
r decremented and repeated until number found or BC0£ EXAMPLE OF BL
OCK TRANSFER The example uses the LDIR instructionto transfer the program
down to amemory area. The power of these insVutructions is wellillustrated by
the simple operation. These instructions can be used also tofill a block of
memory with a singlenumber.£ LD HL,F00H LD DE,ST1 LD BC,BH LDIR RET ST1
DEFB 0 DEFB 0 DEFB 0 DEFB 0 DEFB 0 DEFB 0 DEFB 0 DEFB 0 DEFB 0 DEFB 0
DEFB 0 BLOCK SEARCH As you may now be able to infer, the CPgroup
Compares the content of memorylocations in a block of memory with apredete
rmined number. HL holds thepointer and the BC register the lengthof the
block to be searched. TheAccumulator holds the number for whichthe in
struction will search. If thenumber is found then the Zero flag isset. A
s before the P/V flag indicateswhether BC0. The block instructions stopv, not
withthe pointer(s) pointing at the addressesjust operated on, but to those ab
out tobe processed. Hence if equality is foundthey point to the next address a
nd notthe memory location in which it wasfound.£ Summary - block searchCPI
pointer incrementedCPIR pointer incremented and repeated until num
ber found or BC0CPD pointer decrementedCPDR pointer decremented and repea
ted until number found or BC0£ EXAMPLE OF BLOCK SEARCH In this exam
ple the program itself issearched through until the number C9H isfound (C9H co
rresponds to RET)£ LD A,C9H START LD BC,100 LD HL,START CPIR DEC HL LD A,FFH
CPIR DEC HL LD A,(HL) RET DEFB 6H DEFB 0H DEFB FFH DEFB 88H BLO
CK INPUT/OUTPUT,g INSTRUCTIONS The IN group of block instructionsinput data
from the input port specifiedby the contents of the C register intoa block
of memory starting at theaddress held in the HL register, thelength of
which is in the B register.All forms of IN apply- i.e. INI incrementing
INIR incrementing and repeating IND decrementing INDR decrementi
ng and repeating£ The OUT group is identical to the INgroup, but data from me
mory is output toport (C) in sequence from memorybeginning at location (
HL) The B register is used as a counter asthe IN group. OUTI incrementing O
TIR incrementing and repeating OUTD decrementing OTDR decrementing a
nd repeating The Zero flag indicates B0 in thesecases Since the AMSTRAD us
es the data sentout from the B register as Port addressin I/O instructions, i
t cannot supportthese block I/O instructions.£ PROCESSOR CONTROL INSTRUCTION
S This group of instructions, togetherwith the interru2pt instructions, contr
olthe action of the processor. NOP or No OPeration causes theprocessor
to do nothing for one step.Since its code is 0 , a cleared memoryarea will
be sequenced through until anon-zero instruction is found. HALT st8ops the
sequencing of theprocessor until an interrupt is received( see next lesson )
. After the interrupthas been dealt with, the instructionafter the HALT is
performed. Thus theprogram can be synchronised withoperations outside
the processor.£ As well as the standard CALLinstructions incorporati
ng the addressto which the processor is to jump, theZ80 has instructions
in which theaddress of the CALL is implied. Theinstructions RST n ( wh
ere n00H, 08H,10H, 18H6, 20H, 28H, 30H, 38H ) calls theroutine at 00n H directl
y. i.e. RST 28His equivalent to CALL 0028H Their prime use on some systems
isto allow external hardware to forcethe single byte instructions into
theprocessor, thus making it think itsnext instruction is an RST n.
Ittherefore forms a method of interruptingthe processor. ( see the lesson
oninterrupts).£ All but one RST call are specified onthe AMSTRAD ( the CPC464
FIRMWARE manualdefines them all in detail ). Mostaffect the system con
figuration etc.i.e. RST 00H is equivalent to NEW, thatclears out all the
memory and re-establishes the system. Needless tosay the simulator does
not perform RSTinstructions. There are only two more registers Pinthe Z80 to
discuss, the I or Interruptregister (see next lesson), and the R orRefresh re
gister.£ The Refresh register is used by someforms of Random Access Memor
y whichrequire continuous writing to maintainits information. The R regi
ster isincremented automatically every time theprocessor fetches each par
t of aninstruction from memory. This providesthe programmer with a registe
r whosecontents may be considered random forsome applications. The R and
I registers can be loadedfrom the Accumulator. The instructionsinvolved are s
imply LD A,R LD R,A LD A,I and LD I,A.£Summary - processor control instructi
onsNOP HALTRST n where n 00H, 08H, 10H, 18H, 20H, 28H, 30H, or 3
8H.LD A,RLD R,ALD A,I7LD I,A£ EXAMPLE OF USE OF REFRESH REGISTER Most of the i
nstruction in this and thelast lesson involve steps that changethe environmen
t in which the processoroperates. It is therefore difficult tosimulate these
instructions. Little canbe learnt from single stepping throughan example.
However changing interruptetc. ( see next lesson ) on a PersonalComputer is a
dvanced programming. Trygaining experience on machine codeprogramming b
efore venturing into thisfield. The example shows the use of theRefresh
register as a source of randomnumbers.£ NOP LOOP LD A,R JR LOOP
INTERRUPTS An interrupt originates from outsideth
e processor, requesting it to breakoff its cu9rrent sequence of operationsa
nd deal with some other function. Interrupts fall into two types, Non-Maskabl
e Interrupts (NMI) and MaskableInterrupts (MI). Maskable interrupt canbe ign
ored by the software, but NMIscannot. One Non-Maskable Interrupt is available
on the Z80 chip. The interruptautomatically performs an RST or CALL to
address 0066H on completion of thecurrent instructions. The routine at
0066H is performed. The instruction RETNor RETurn from Non-maskable interrupt
returns control back to the interruptedroutine at its next instruction .£The pr
ogrammer can arrange that maskableinterrupts (MI) are ignored. Within theZ80 t
here is a flag, the interruptenable flag, that can be set andcleare
d. Depending upon the state ofthis flag MIs will be accepted orignore
d. The two instructions that manipulatethis flag are EI Enable Interrupts.
After one more single byte instruction, further interrupts are acce
pted. DI Disable Intevrrupts immediately. Entry into a maskable interr
uptautomatically disables interrupt.£Three types, or modes, of maskableint
errupts are available. MODE 0 is set by the instruction IM 0.This mode is
the one describedpreviously, where the RST n instructionis forced onto the
data highway to foolthe processor into performing therestart. MODE 1 is
the one used by the AMSTRADsystem ROM. It is set by the instructionIM 1. Thi
s mode is similar in operationto the Non MaskablMe Interrupt exceptthat pro
cessor is restarted at 0038Hinstead of 0066H as in the NMI.£ MODE 2 is the
most flexible, theaddress to which the processor is forcedis the indirect a
ddress held in a memorylocation. The address of this memorylocation is comp
uted from the contentof the I register, which provides thehigh byte and t
he interrupting devicewhich provides the low byte. Sincethe interrupt r
outine is addressedindirectly the interrupts are termedvectored interrup
ts. An interrupt can occur at any time.It follows therefore that if
theinterrupted program is to be continued( i.e. be re-entered ), the contents
ofany register that the interrupt routineuses must be stored or pushed onto
thestack, and rel,oaded or POPped from thestack before returning£ To ensure
that no other interruptoccurs during this period and thereforecorrupts the
register contents beforethey are safe, the interrupts arediabled durin
g these operations.£ We must refturn from an interruptroutine with the
instruction RETI( RETurn from Interrupt ) and not RET. Hence interrupt rout
ine take the form-(1) Enter maskable interrupt, interrupts are disabled at th
is time.(2) PUSH or EXchange required register)ed(3) Enables interrupt if requir
ed.(4) Do interrupt routine.(5) Disable interrupt if required.(6) POP or EXchang
e registers.(7) Enables interrupts(8) Return from interrupt (RETI).£ This comp
letes a study of all theinstructions available on the !Z80 chip. You should
now be able to use otherassemblers to write your own programs.You will f
ind that most are not souser friendly, and that you will notbe able to
one step easily throughinstructions. Don't despair. You canalways retu
rn to this Tutor to simulateyour problem. Since the AMSTRAD CPC 464 processor i
ssurrounded with interface chips AMSOFTrecommend the machine code programme
rto address these devices through thesoftware resident within the ROMs. Th
eAMSTRAD JCPC464 FIRMWARE MANUAL publishedby AMSOFT defines in detail not only t
hevarious CALLs available but the totalsystem structure.£ GOOD LUCK and H
APPY PROGRAMMING£ INTRODUCTION The final set of lessons introdu
cesmore speciablised registers and instruct-ions, and looks at the way the Z80
cantalk with the outside world. The last lessons deal with instructionsthat a
llow the outside world tointerrupt the processor.£ LESSONS 26
- 35 26. The index registbwers Ex - use of index registers 27. Th
e alternative set of registers Ex - using alternative set 28. Input
/Output instructions Ex - I/O instructions 29. Block instructions -
introduction 30. Block tranfer instructions Ex - block transfer 31
. Block search instructions Ex - block search 32. Block I/O instru
ctions 33. Processor control instructions Ex - control instructions
34. Interrupts 35. Finale Load earlier lessons for revision£A veryimpor
tant point. The largest positive number we can holdin a single register, u
sing thisnotation is 01111111 or 127 and thelargest negative number 1
0000000 or-128.£ The Z80 has two instructions that maybe used for these opera
tions CPL complements or inverts the contents of the Accumulator.
NEG negates, or makes negative, the contents of the Accumulator by
complementing and adding 1 in one operation. A Sign flag FR(S) is p
rovided on the Z80.It duplicates the sign ( bit 7 ) of theanswer after any arit
hmetic operation onthe Accumulator. The sign flag is "0"for a positive res
ult and "1" for anegative result.£ When performing arithmetic operationswhic
h we wish to interpret within therange -128 to +127, the Carry flag nolong
er signals an out of range result.However another flag, the overflow (P/V)flag
does. It is a "1" whenever theanswer is outside the range -128 to +127and
"0" within the range. It iseffectively a carry into bit 7 whichwoul
d make the sign bit incorrect.£ There is no reason for sticking to 8bits usi
ng this method. So long as thenumber of bits is sufficient and themost sig
nificant bit is taken as thesign bit any size positive or negativenumber ca
n be represented. Performing a similar calculation to theabove we can show tha
t a register paircan represent a number in the range+32767 to -32768. The
Sign and overflow flags are alsooperative after AvDC and SBC instructionon th
e HL register. It reflects the 15thbit (or bit 7 of H register) .£ It is importa
nt to remember that theZero, Carry, Sign, and overflow flagsare always ope
rative after an 8 bitarithmetic instruction or a 16 bitaddition inv
olving the Carry. Yourinterpretation of the result determinesin which f
lag(s) you should beinterested in.£ EXAMPLES OF +VE AND -VE NOTATION Al
though these examples appear to beall positive, they can be viewed equallyas
nee%gative where appropriate and theSign and overflow flags observedo
perating. Remember a number above 128 isnegative. Since all the negativ
e numbersin the examples are small, they can beseen quickly and simply be conv
erted bysubtractinSg the number from 256. i.e. -2 is equivalent to 254 etc.£
LD A,254 NEG NEG ADD A,2 INC A LD HL,2 LD DE,FFFEH ADD HL,DE CPL LD HL,
STORE LD (HL),7FH INC (HL) RET STORE BIN 0 88($"88(H0$ff$/ yyyyyyy3ve "TE
XT3",B,&5800,&5500TER"ad00179,&ed,&78,&cb,&47&1b,&7a,&B3 f,&0M W UX.X/X3X7XDXQXX
eXoXvXXXXXXXXXXXXtXwNavbWcehk&loo ptsv1wzwzjM(z £ REGISTERS and MEMORY R
egisters E are like pigeon holes inwhich numbers can be stored. A singler
egister can store any number between0 and 255. The Z80 has many suchr
egisters. Initially we shall consideronly the more general ones designatedA,
B,C,D,E,H and L. The A register ( orAccumulator ) is the most important,si
nce more instructions involve thisregister than any other. The step by step
instructions making upa program are stored in memory, a seriesof similar re
gisters or memorylocations external to the Z80 chip.65536 memory locat
ions can be accessed.They are designated by their numberbetween 0 and 6553
5. It takes the Z80longer to access memory than its owninternal registers
.£ SIMPLE LOAD INSTRUCTIONS Perhaps a better ' description of loadthan t
he conventional one is copy, sincea load instruction copies the numberheld i
n a register or memory locationinto another register or memorylocati
on. As with all copying theoriginal remains unchanged. The Kload instr
uction is normallyabbreviated to LD. The simplest form ofload copies data
from one register toanother, i.e. LD A,B . In these abbreviationed instruc
tions( mnemonics ), it is conventional to putthe register affected first, follow
ed bythe register from which the informationis copied. Hence LD A,B copies
thecontents of B into A or Accumulator.£ We can also load any of the registe
rswith a number, n, between 0 and 255directly , with instructions li
keLD C,123. We shaRll discuss later fromwhere the number is copied. Suffice
tosay at this stage, that instructionsare stored as numbers. i.e. LD A,B
isstored as 78. Some instructions likeLD A,B are stored as one number, oth
erstake up to four. The two types of instructions discussed( LD r,r' and LD r,
n ) can involve anyof the registers considered. Only theA register can b
e loaded with thecontents of a memory location. Theinstructions of the
form LD A,(nn) loadsor copies the contents of memorylocation nn ( a nu
mber between 0 and65535 ) into the A register.£ We can also load a memory loca
tion withthe contents of the Accumulator withLD (nn),A where nn is the
number oraddress of the memory location. All other single regis ters cannot b
eloaded directly from a memory location.Two instructions involving the
Aregister are required.£ Summary - Loading single registersLD r,r' where r
and r' are any of the following A,B,C,D,E,H and L.LD r,n where n i
s a number 0 - 255LD A,(nn) where nn is a number 0 to 65535LD (nn),
A£ REGISTER PAIRS The fact that a single register canonly hold n
umbers up to 255 and thetotal memory available is up to 65535,is a limitat
ion. For0x this reason thereare a whole set of instructions on theZ80 that
deal with registers in pairs.The pairs are BC, DE, and HL registerpairs. The
two registers hold different partsof a number. Consider the decimal number27.
We can think of this as X having twoparts the high part ( or byte) is the 2sin
ce it represents 2*10 , the low part( or byte ) is the 7, since it onlyrep
lesents 7*1 . The total number is2*10 + 7*1 27. Each digit can only be0 -
9 i.e. 10 different numbers.£ A single register can hold 0-255, 256different
numbers. If we put tworegisters side by side, i.e. HL , the Hregister
holding the High byte and the Lholding the Low byte, then we can holdin the re
gister pair H*256 + L*1 in thesame way as 27 2*10 + 7*O1. The maximumthat can
be held in a register pairis therefore 255 * 256 + 255 65535.By convent
ion the high byte is storedin the first register in the registerpair name.
We can load any of the register pairswith a number between 0 - 65535 directly
using instructions like LD HL,nn. Just as we can combine two registers tohold nu
mbers up to 65535, we can combineadjacent memory locations. Byconvent
ion the Low byte is held in thelocation with the Lower address.£ We can ther
efore load a register pairwith the contents of a pair of memorylocations, w
ith instructions likeLD DE,(nn) . This instruction isequivalent to
the non-valid instructionsLD E,(nn) and LD D,(nn+1). Similarly, we can load th
e contents ofa reg$ister pair into a pair of memorylocations, i.e. LD (nn)
,BC which isequivalent to the two non-validinstructions LD (nn),C and
LD (nn+1),B. There are no instructions to loadregister pairs with the
contents ofanother register pairk. Two instructionsthe form LD r,r' are u
sually used toperform such an operation. There is one instruction similar t
othis type EX DE,HL. It EXchanges thecontents of the DE register pair with
the contents of the HL register pair.£ Summary - loading register pairsLD dd,nn
where dd is any register pair BC, DE, and HL. nn is a n
umber 0 - 65535LD dd,(nn)LD (nn),ddEX DE,HL exchanges register contents£
INDIRECT ADDRESSING Up to now we have onFly usedinstructions in
which memory locationshave been specified directly in theinstruction. Ano
ther useful method ofspecifying a memory location is to use anumber held in a
register pair, knownas indirect addressing. The instructionLD B,(HJL) for e
xample allows us to loador copy to the B register the contentsof the memory l
ocation whose address isin the HL register pair. All single registers can b
e loadedusing the HL register pair as a pointer. Similarly , memory locations
canE beloaded indirectly from any singleregister using the contents o
f the HLregister pair as address i.e. LD (HL),C.£ Use of the BC and DE re
gisters forindirect addressing is limited to the Aregister. i.e. LD (DE),A LD A
,(BC) etc.£ Summaryb - indirect addressingLD r,(HL) where r is any single reg
ister A,B,C,D,E,H, or L.LD (HL),rLD A,(BC)LD A,(DE)LD (BC),ALD (DE),A£
ADDITIONS AND THE CARRY FLAG Both single register and register pairadditio
n are possible on the Z80. All single register additions areperformed with
the Accumulator. A number( i.e. ADD A,6 ), the contents of aregister (i.e.
ADD A,B), or the contentsof an indirectly addressed memorylocation usin
g the HL register pair(i.e. ADD A,(HL) ) can be added to theAccumulator. T
he result is held in theAccumulator. The source of the additionis unaffected.
Register pair addition is performed inconjunction with the HL register pair,
and can only involve BC or DE ( i.e.ADD HL,BC or ADD HL,DE ). Again the
the result is held in the HL registerpair, and the other register pair is
unaffected.£ Single and double register additionswill obviously only give
the correctresult if the answer is less than themaximum number the rWegister
(s) can hold.If it is greater than this a carry isgenerated. The processor
holds thissingle bit of information or flag, sothat action can be tak
en over theoccurrence of the carry. If there hasbeen a carry on the la
st arithmeticoperation the carry is said to be set toa "1" . If not set it is
said to be a"0". A second form of addition is availableon the Z80 , for
both single andmultiple registers, known as add withcarry abbreviated to
ADC. They aresimila r to ADD except that if the Carryflag is set before
the addition theresult is incremented by one. Allpreviously mentioned
ADD instructionscan be performed as ADC.£ ADC instructions can be strung togeth
erto perform the addition of two numbersof any length, as the examples wi
llshow.£ Summary - additionADD A,n where n is a number 0 - 255ADD A,r w
here r is any single registerADD A,(HL)ADD HL,BCADD HL,DEADC A,nA
DC A,rADC A,(HL)ADC HL,BCADC HL,DE£ SUBTRACTION AND THE CARRY FLAG Single reg
ister subtraction takes placewith the Accumulator. All the forms ofADD can b
e used in subtract. Theabbreviation or mnemonic SUB is alwayswritten wit
hout the A, which is implied.Hence the instructionas are SUB n, SUB r,and SUB (H
L). Again the result is heldin the Accumulator. The carry flag isset to a "
1" if the result is outsidethe range 0 - 255.There are no double regis
ter SUBinstructions.All configurations of ADC instructionscan be used with
SBC or SuBtract withCarry instructions. The operation issimilar to SUB, e
xcept that the resultis decremented by one if the carry flagis set.£ Like ADC
instructions SBC instructionscan be strung together to subtract anylength num
ber. Since double register subtraction canonly be performed with carry, the s
tateof the carry flag prior to SBC HL,BC,and SBC HL,DE is important, and sh
ouldbe "0". The carry flag can be set to a "1" withthe instruction SCF or Set C
arry Flag.Although there are no specificinstructions to clear the ca
rry flag to"0" there is an instruction to invert itCCF or Compliment Carry Flag
. We shallsee later that all logic instructions doclear the carry flag.£ SUMMAR
Y - subtract with carrySUBv n )SUB r ) SUBtract from A, n, r, orSUB (HL
) ) (HL)SBC A,n )SBC A,r ) SuBtract from A with carrySBC
A,(HL))SBC HL,BC ) SuBtract from HL with carrySBC HL,DE )SCF Set Carry
FlagCCF Compliment Carry Flag£ INCREMENT AND DECREMENT INSTRUCTIONS The
last arithmetic instructions to bediscussed can be performed on any singleor do
uble register(s). These are INC andDEC. INC increments (or increases) theconte
nts of the register, or memorylocation indirectly addressed by the HLregis
ter pair, by one. DEC decrements( or decreases ) the contents of theregis
ter or memory location indirectlyaddressed by the HL register pair, by The
carry flag is not affected byeither of these instructions. These instructi
ons are primarily usedwhere counters are required. Theoperation on r
egister pairs is alsouseful in sequential operations onmemory locatio
ns utilising indirectaddressing.£ Summary - increment and decrementINC rINC (
HL)INC ddDEC rDEC (HL)DEC dd£ THE ZERO FLAG Another very useful fla
g included inall processors is the Zero flag. Thisflag is set to "1" if the
result of anysingle register arithmetic operation iszero. Otherwise it is clear
ed nto "0". It is only affected by double registerarithmetic operations inv
olving thecarry flag , i.e. only affected byADC HL,dd or SBC HL,dd. The
zero flag, like the carry flag, isunaffected by any LD or EX instructions.£ Su
mmary - zero andE carry flagsinstruction Carry Zero r
dd r dd LD . . . . EX n/v .
n/v . ADD * * * . ADC * * * *
SUB * n/v * n/v SBC * * * * INC
. . * . DEC . . * .r single register d
d double register * flag affected . flag not affected n/v instructi
on not valid£ Lesso'ns 1 - 9 1. Registers and Memory 2. Simple Load
Instructions Ex - simple load instructions 3. Register Pairs E
x - register pair loading 4. Indirect Addressing Ex - indirect addressi
ng 5. Addition and the Carry Flag Ex - single register addition
Ex - register pair addition 6. Subtraction and the Carry Flag Ex - reg
ister subtraction Ex - register pair subtraction 7. Increment and Decre
ment Ex - inc and dec instructions 8. , Zero Flag Ex - zero flag
9. Compare Ex - comparison instructions Load further lessons from tape£
INTRODUCTION The Z80 is the microprocessor at theheart of your Amst
rad. This program willteach you the use of all £ theinstructions avai
lable on the Z80, ina series of simple progressive lessons. After each l
esson, step by stepexamples are given. To further improveyour understandin
g of the topic, you maythen modify or rewrite the examples, andrun them pwithou
t fear of crashing thesystem. Proceed through the menu by pressingENTER to
begin the highlighted lesson orexample, and SPACE to jump to the next.At anytim
e BREAK will return you to themenu.£ INTRODUCTION TO RUNNING SIMULATOR All
examprjles are run using theSimulator. At this stage the only areasof t
he simulator screen to consider arethe Source Code ( the third column thathold
s the instructions ) and the area atthe bottom of the screen, which displaysthe
contents of the regisv%ters. Otherareas will be described as they arere
quired. The assembler, that converts instruct-ions into machine code, will
acceptLabels. Instead of putting an addressinto the program, we can give it
a name.The assembler will then allocate amemory location to it. The name
must becalled up in the program with itsinitial condition using the inst
ructionDEFB, DEFine Byte.£ DEFB is an assembler instruction not aZ80 instructi
on. The allocated memoryaddress is given in the first column. The simulator wi
ll display the contentsof this memory location, in decimal, inthe second column
. Before each instruction is executed theinstruction is described in ENGLISH. Tr
yto work out what should happen beforepressing any key to perform th
einstruction.£ You may go through the example as manytimes as you like, until y
ou understandit. If you still find difficulty, pressESC, skip over the lesson
s and re-ENTERthe lesson with which you are havingdifficulty. The manual how
ever gives anoutline of each lesson. When you do understand the examplesgiv
en try modifying them using theeditor. Then try entering your ownpro
grams. All programs should end withRET ( or return ). Don't worry if youfor
get, the simulator will tell you. Remember, it is impossible for aprogram
to destroy your computer. You'llneed a hammer to do that!£ LD A,34 LD B,A LD
(3867),A LD A,(STORE) LD (3867),A LD A,B LD (STORE),A LD C,B LD A,(3867)
LD A,67 LD (3866),A RET STORE DEFB 124 DEFB 0 REGISTER PAIR EXAM
PLES The example illustrates each type ofinstruction that loads register pa
irs.It also demonstrates that a register/memory pair are still two indivi
dualregisters or memory locatiV0ons and can betreated as such. Another assemb
ler instruction isintroduced, the DEFW instruction. Theassembler allocate
s 2 memory locationsto the associated label. The numberafter the DEFW
sets the initialconditions. The address in the first column is thelow by
te address. The second columndisplays the contents of the pair ofmemory
locations as a single number.£ LD DE,256 LD E,4 LD (STORE),DE LD (LOW),DE LD
A,2 LD (HIGH),A LD HL,(LOW) EX DE,HL LD D,0 RWET STORE DEFW 32000 LOW
DEFB 0 HIGH DEFB 0 EXAMPLES OF INDIRECT ADDRESSING These examples i
llustrate indirectaddressing. At this stage it isimpossible to demon
strate its useful-ness. It is employed extensive in laterexamples£ LD HL,LOW
LD C,(HL) LD HL,HIGH LD B,(HL) LD A,(BC) LD DE,3860 LD (DE),A LD (HL),0
LD BC,3862 LD (BC),A RET LOW DEFB 21 HIGH DEFB 15 DEFB 0 EXAMPLES O
F SINGLE REGISTER ADDITION The example adds together Wg the twonumbers 874
0 and 1260 using singleregister addition only. The doublelength numb
ers are held in BC and DE sothat the results can be displayedeasily. Th
is method of addition can beperformed using register pair addition,as wellD, t
o add together numbers of anylength. The state of the individual flags aredisp
layed to the left of the registers.£ LD DE,8740 LD BC,1260 LD A,E ADD A,C LD
C,A LD A,D ADC A,B LD B,A LD HL,STORE LD A,15 ADD A,(HL) RET STORE D
EFB 25 EXAMPLE OF REGISTER PAIR ADDITION This example effectively multipl
ies anumber held in the HL register pair by10 using addition to success
ivelymultiply by 2.£ LD HL,(STORE) ADD HL,HL ADD HL,HL LD DE,(STORE) ADD HL,
DE h ADD HL,HL LD (STORE),HL LD HL,1000 LD A,255 ADD A,1 ADC HL,HL RET
STORE DEFW 6000 EXAMPLE OF SINGLE REGISTER SUBTRACTION This example subtract
s 1260 from 8740using only single register subtraction.The two numbers are
held in allocatedmemory locations this time. This method of subtraction ca
n beextended to any length number andregister pair subtraction.£ LD HL,N
UM1 LD DE,NUM2 LD A,(DE) SUB (HL) LD (DE),A LD E,18 LD L,20 LD A,(DE) SB
C A,(HL) LD (DE),A RET NUM2 DEFW 8740 NUM1 DEFW 1260 EXAMPLE USING RE
GISTER PAIR SUBTRACTION This example illustrates subtraction ofregister pairs.
It subtracts 1536 from65536. At least 3 bytes of memory arerequired to hol
d the latter number,the highest byte representing 65536. Although ADC and
SBC may require theCarry flag to be cleared first, if theprevious calculation
NEVER results in acarry being generated, this step may beomitted. However it
is often better tobe safe and include it, than look forthe randomly occurri
ng fault that it cangenerate.£ LD HL,(NUM1L) LD DE,(NUM2L) SBC HL,DE LD (ANSL
),HL LD HL,(NUM1H) LD DE,0 SBC HL,DE LD (ANSH),HL RET NUM1L DEFW 0 NUM1H
DEFW 1 *65536 NUM2L DEFW 1536 ANSL DEFW 0 ANSH DEFW 0 EXAMPLE OF INCREMEN
T AND DECREMENT At present the programs that can bewritten are somewhat limi
ted. INC and DEC really only become usefulin conjunction with instructions to
beintroduced shortly.£ LD C,5 LD HL,STORE LD (HL),C INC C INC HL LD (HL),
C DEC C INC L LD (HL),C INC H RET STORE DEFB 0 DEFB 0 DEFB 0
EXAMPLES OF ZERO FLAG While running this example try topredict the state o
f the Zero flag afterthe instruction has been performed.£ LD HL,257 DEC L LD A
,23 SUB 23 LD DE,256 INC A SBC HL,DE INC H SUB 2 SBC HL,DE LD HL,1 DEC
HL RET COMPARE So far all instructions we havedisc
ussed that affect the Carry orZero fPlags also affect the registercon
cerned. There are a number of usefulinstructions that only affect flags. Thecom
pare or CP instruction is one ofthese. CP compares the contents of the
Aregister with a number (CP n), anotherregister (CP r), or any memory locat
ionindirectly addressed through the HLregister pair ( CP (HL) ). The comp
areinstruction is effectively SUB but theresult does not affect the contents
ofthe A register.£ If n is the number with which A iscompared, then the fo
llowing results - Carry Zero A n 0
0 A n 0 1 A n 1 0£ Summar
y - comparisonsCP n Compares A with n ( 0 - 255)CP r Compares A with reg
ister rCP (HL) Compares A with memory location
(HL)£ EXAMPLES OF COMPARE Try to predict the state of the Zeroand
Carry flags before performing thecomparison. In the next lessons we willbe
using tW5hese flags extensively, toproduce more interesting examples.£ LD A,
5 CP 4 CP 5 CP 6 LD B,3 CP B LD HL,STORE CP (HL) DEC (HL) CP (HL) ADD
A,230 CP (HL) RET STORE DEFB 6 0pp088(((88(D88($"88(H0$ff$2yyyyyyy0ve "TEX
T0",B,&5800,&55000TER"ad00179,&ed,&78,&cb,&47&1b,&7a,&B3 f,&0QTous droits réservés. Reproduction sans autorisation interdite. © Kukulcan